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    會員年限:11年

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    監控電路 CPU w/2K.CAT1025WI-30-GT3
    監控電路 CPU w/2K.CAT1025WI-30-GT3
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    監控電路 CPU w/2K.CAT1025WI-30-GT3

    型號:

    .CAT1025WI-30-GT3

    封裝:

    SOIC-8

    批號:

    18+

    包裝:

    3000

    PDF資料:

    點擊下載PDF

    產品信息

    Precision Power Supply Voltage Monitor
    — 5 V, 3.3 V and 3 V systems
    — Five threshold voltage options
    Active High or Low Reset
    — Valid reset guaranteed at VCC = 1 V
    400 kHz I
    2
    C Bus
    2.7 V to 5.5 V Operation
    Low power CMOS technology
    16-Byte Page Write Buffer
    Built-in inadvertent write protection
    — WP pin (CAT1025)
    1,000,000 Program/Erase cycles
    Manual Reset Input
    100 year data retention
    Industrial and extended temperature ranges
    Green packages available with NiPdAu Lead
    finished
    For Ordering Information details, see page 19.
    DESCRIPTION
    The CAT1024 and CAT1025 are complete memory
    and supervisory solutions for microcontroller-based
    systems. A 2k-bit serial EEPROM memory and a
    system power supervisor with brown-out protection
    are integrated together in low power CMOS techno–
    logy. Memory interface is via a 400 kHz I
    2
    C bus.
    The CAT1025 provides a precision VCC sense circuit
    and two open drain outputs: one (RESET) drives high
    and the other (RESET ¯¯¯¯¯¯) drives low whenever VCC falls
    below the reset threshold voltage. The CAT1025 also
    has a Write Protect input (WP). Write operations are
    disabled if WP is connected to a logic high.
    The CAT1024 also provides a precision VCC sense
    circuit, but has only a RESET ¯¯¯¯¯¯ output and does not
    have a Write Protect input.
    The power supply monitor and reset circuit protect
    memory and system controllers during power up/down
    and against brownout conditions. Five reset threshold
    voltages support 5 V, 3.3 V and 3 V systems. If power
    supply voltages are out of tolerance reset signals
    become active, preventing the system microcontroller,
    ASIC or peripherals from operating. Reset signals
    become inactive typically 200 ms after the supply
    voltage exceeds the reset threshold level. With both
    active high and low reset signals, interface to
    microcontrollers and other ICs is simple. In addition,
    the RESET ¯¯¯¯¯¯ pin or a separate input, MR ¯¯¯, can be used
    as an input for push-button manual reset capability.
    The CAT1024/25 memory features a 16-byte page. In
    addition, hardware data protection is provided by a
    VCC sense circuit that prevents writes to memory
    whenever VCC falls below the reset threshold or until
    VCC reaches the reset threshold during power up.
    Available packages include an 8-pin PDIP and a
    surface mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN
    and 8-pin MSOP packages. The TDFN package thick
    ness is 0.8 mm maximum. TDFN footprint is 3 x 3 mm
    2021年最新最全的乱伦强奸,最热门乱伦强奸,最火爆乱伦强奸,最嗨乱伦强奸

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